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Development of a High-level Model for Simulation of the Networks-on-Chip with Different Topologies

Student: Fedotova Alina

Supervisor: Aleksandr Romanov

Faculty: HSE Tikhonov Moscow Institute of Electronics and Mathematics (MIEM HSE)

Educational Programme: Information Science and Computation Technology (Bachelor)

Final Grade: 8

Year of Graduation: 2019

This paper addresses the problem of simulating an effective network on a chip with various topologies, such as mesh, torus, two-dimensional circulant, based on a high-level model. A review and analysis of the routing algorithms, as well as existing solutions are made, their main advantages and disadvantages are identified. Based on research data, a model is developed for simulating networks on a chip in a high-level Java programming language. The analysis of simulation results is carried out and the most effective topology is revealed. Work scope: 33666 symbols with spaces, 39 pages. The number of illustrations: 29; tables: 7. The number of references: 15

Full text (added May 25, 2019)

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