Modeling and Simulation of High-Frequency Field-Effect Transistor

The purpose of this work is to form and verify the methodology and procedure of modeling high frequency field effect transistors using the example of short channel MOSFETs manufactured by CMOS technology with minimum length of 100 nm. The first chapter discusses the general characteristics of high-frequency CMOS technology, parameters of high-frequency field transistors that should be taken into account in modeling, such as: cut-off frequency, maximum frequency of oscillations and noise factor. This chapter also discusses the requirements for both RF circuits in terms of power and frequency and for transistors in terms of scaling. The second chapter considered the methodology of high-frequency measurements, including pre-calibration and deembedding; Modeling effects occurring in HF MOSFETs (both internal and external). The third chapter shows the results of measurements of characteristics at high frequencies (according to literary data), formed a methodology of identification of model parameters, including automated determination of parameters of the basic SPICE model and calculation of parameters of components of the external macro model; The listed methodology was verified on a specific example during parameter identification.