Software Modification for Superscalar Processor Modeling. Logic Changes to Diagram Potting

Superscalar processor – processor which can execute several instructions at the same time, so basically it supports instruction parity. This is possible because it has several similar functional nodes in its architecture. Scheduling the execution of a stream of instructions is carried out dynamically by the computational core, and not statically by the compiler. When studying the principles of operation of such processors, students often face the problem of practical study of the topic. They often lack enough clear and convenient tools for carrying out practical experiments, and a visual understanding of the processor's operation. Therefore, the development of such software that makes it possible to demonstrate the operation of the processor more clearly is an important task. The work was based on a pre-made simulator in which changes were made to obtain statistics, more convenient work with the generated tables, as well as interface improvement. This work contains 45 pages, 24 figures and 13 used sources.