Development of 16-bit Soft-Сore Microprocessor Based on RISC-V Architecture

The Internet of things industry is currently one of the main sources of demand for embedded processors. Such embedded systems do not require high performance, which most of the advanced microprocessors provide with minimum size and price. The aim of this work is to develop a simple 16-bit software soft microprocessor based on the rapidly developing and modern RISC-V architecture. That should be a hardware-independent IP solution. As part of the work, in order to achieve proposed goal, the microarchitecture of the soft-core processor was developed and described with System Verilog hardware description language, based on a literature review of the topic and research of the RISC-V ISA concept. In order to verify and maintain the quality of the developed microprocessor, an automated verification system was developed based on Continuous Integration and UVM best-practices. This work can serve as a starting point for creating an ergonomic universal microprocessor for embedded systems and contribute to the development of embedded processor technologies. The microprocessor project can already be used for educational purposes to study the architecture of RISC-V and the principles of organizing verification systems. The project is the basis for the development of the pipeline version of the processor. The paper contains 91 pages, 6 chapters, 51 figures, 52 references, 3 appendices Keywords: 16-bit soft-core microprocessor, RISC-V, System Verilog, embedded systems, automated verification